IP Verification Engineer - Low Power / Formal / UVM

Job highlights

• Experience in System Verilog and UVM is a must.
• Mandatory Skills : Hands on experience in IP / Block or Sub system level verification.
• Hands on experience in Low Power Verification / UPF,code coverage and functional coverage.
• Experience in Formal verification.
• Experience in ARM Protocols - AXI and AHB.

Location : Bangalore

Mandatory Skills :
Hands on experience in IP/Block or Sub system level verification.
Hands on experience in Low Power Verification/UPF, code coverage and functional coverage.
Experience in Formal verification.
Experience in System Verilog and UVM is a must.
Experience in ARM Protocols - AXI and AHB.
Familiarity with scripting languages like Perl, Python