Advanced Packaging & Substrate Design Engineer

About the Company:

Translarity is a growing pre-IPO leader in the semiconductor test industry, delivering innovative wafer test and package solutions that power quantum and AI technology shaping our digital world. Headquartered in Silicon Valley, with operations in California, Texas, the Philippines, Taiwan, and Vietnam, we serve leading semiconductor manufacturers and their global supply chain partners.

A probe card is a critical component in semiconductor testing, acting as the interface between automated test equipment and the semiconductor wafer. These assemblies often include complex multi-layer PCBs with tens of thousands of routed traces and thousands of discrete components, supporting mixed-signal, high-speed, RF, and power-delivery paths. Precision and electrical integrity are essential for accurate wafer-level testing.

Position Summary:

We're taking our wafer test expertise into quantum computing and need an engineer to design package and substrate hardware for it. The work runs at cryogenic temperatures, carries microwave signals, and doesn't follow all the usual rules. You'll start from strong conventional packaging fundamentals and take them somewhere new.

Responsibilities:

• Own package and substrate design for quantum hardware, from concept through production
• Design for RF/microwave signal integrity, power delivery, and thermal performance at cryogenic temperatures
• Work directly with manufacturing, test, and customer engineering
• Take designs into the lab and prove them out

Qualifications:

• Direct SoC experience
• RF design experience
• Cadence APD or equivalent package design tools
• Comfort owning a design end to end

Strongly Preferred:

• Cryogenic design or test experience
• Thermomechanical analysis and modeling
• Superconducting or quantum hardware exposure

Education and/or Experience:

• BS in Electrical Engineering, Mechanical Engineering, Materials Science, Physics, or related field; MS or PhD a plus
• 5+ years hands-on in advanced or heterogeneous IC packaging, or substrate design

Physical Requirements:

Office and lab environment.

Compensation:

Job Type: Full-time

Benefits:

• 401(k)
• Dental insurance
• Health insurance
• Paid time off
• Vision insurance

Work Location: In person in Fremont, CA or Hutto, TX