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AI Chip Software & Compiler Engineer (LLM Optimization)

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Onsite

AI Chip Software & Compiler Engineer (LLM Optimization)

ECARX

AI Chip Software & Compiler Engineer (LLM Optimization)

Skills

Deep LearningPythonPyTorchTensorFlowMachine LearningAI

6 days ago

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Important information


Contract type:

Permanent

Location:

London, UK

Work mode:

Onsite

Published on:

15 October 2026

What they need


Join our AI chip software team to build the compiler, runtime, and kernel libraries that unlock the full potential of our AI accelerator hardware. You will work at the intersection of AI models and silicon, optimizing large language model (LLM) inference and training workloads for our custom accelerator architecture. This role is ideal for someone who enjoys bridging the gap between cutting-edge AI research and high-performance hardware.

Responsibilities

  • Design and implement compiler passes and optimization strategies for AI accelerator code generation (LLVM/MLIR-based)
  • Develop high-performance kernel libraries (GEMM, convolution, attention, normalization) optimized for our AI accelerator architecture
  • Lead LLM inference optimization on our hardware platform — including KV cache management, batching strategies, quantization, and speculative decoding
  • Collaborate with hardware architects to define the accelerator ISA, programming model, and performance features
  • Work with the AI framework team to integrate our compiler stack with PyTorch, ONNX, and other model formats
  • Build performance analysis tools and benchmarks to measure and improve model execution efficiency
  • Drive performance optimization across the full stack — from model-level down to instruction scheduling
  • Contribute to the AI software roadmap and help shape the direction of our accelerator software ecosystem

Qualifications

  • 5+ years of experience in high-performance computing, compiler development, or AI/ML systems
  • Strong programming skills in C/C++ and Python
  • Deep experience with GPU/AI accelerator programming (CUDA, OpenCL, or similar)
  • Hands-on experience with deep learning frameworks (PyTorch, TensorFlow, JAX)
  • Understanding of neural network architectures and their computational patterns (transformers, CNNs, RNNs)
  • Experience with performance optimization, profiling, and benchmarking of AI workloads
  • Knowledge of compiler infrastructure (LLVM, MLIR, XLA, or TensorRT)
  • BSc, MSc, or PhD in Computer Science, Electrical Engineering, or related field

Preferred Qualifications

  • Experience with LLM inference optimization techniques (vLLM, TensorRT-LLM, llama.cpp)
  • Experience with Triton, TVM, or similar domain-specific compilers
  • Knowledge of low-precision arithmetic (FP8, INT8, INT4) and mixed-precision training/inference
  • Background in computer architecture or hardware design
  • Open-source contributions to AI/ML projects

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