Analog Layout Intern

Job highlights

• This internship is intended for candidates who already have a basic understanding of Analog IC Layout and want to gain practical exposure by working on structured layout assignments and semiconductor design activities.
• Internship Exposure
• Eligibility. College Students / Recent Graduates.

Job Summary

This internship is intended for candidates who already have a basic understanding of Analog IC Layout and want to gain practical exposure by working on structured layout assignments and semiconductor design activities.

Eligibility

College Students / Recent Graduates

Requirements

• Basic understanding of MOSFETs and semiconductor fundamentals
• Knowledge of analog layout concepts and design rules
• Familiarity with device placement and routing
• Basic understanding of matching, symmetry, common-centroid, guard rings and isolation
• Working knowledge of Cadence Virtuoso or similar IC layout tools
• Basic knowledge of DRC and LVS
• Ability to understand basic analog schematics
• Strong interest in Analog IC Layout and semiconductor physical design

Internship Exposure

• Analog Layout
• Device-Level Layout
• Precision Matching
• Floorplanning
• Critical Routing
• DRC/LVS
• Physical Verification

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.