Synopsys
Applications Engineering, Staff Engineer
Skills
1 month ago
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Important information
Salary:
$129,000 – $193,000 / year
Location:
Sunnyvale, CA, USA
Work mode:
Onsite
Published on:
15 September 2026
What they need
Position Summary The Staff Applications Engineer for Prime Power RTL 2.0 independently supports and leads customer deployments of RTL-stage power analysis, estimation, and optimization. This role owns end-to-end delivery of PPRTL evaluations and production integrations for assigned accounts across logical, physical, and hybrid NDM import flows. With moderate supervision, the Staff AE handles day-to-day customer and technical work independently—from evaluation scoping through flow deployment, issue resolution, and knowledge transfer—with direct impact on Applications Engineering results. Level Profile • Supervision & Scope: Moderate supervision; owns entire projects within the PPRTL product area.
- Impact: Direct impact on department results; may guide L1/L2 AEs. • Experience: BS + 5 years related experience, or MS + 3 years. Key Responsibilities • Lead PPRTL evaluations and production deployments; present methodology, flow options, and CGE/CGR/DACGE results; manage timelines and customer deliverables. • Deploy customized flows: logical (CGE/lint/ODC), physical (RTLA, glitch/SDF), and hybrid NDM import; develop Tcl scripts and staged save/restore methodologies.
- Apply calibration (WCDF extraction and synthesize -apply_calib) when designs require improved RTL-to-signoff correlation; guide customers on FSDB stimulus quality. • Independently resolve elaboration, library, SDC, FSDB, power accuracy, glitch, and multi-rail UPF issues; troubleshoot VCS, Verdi, PrimeTime, and RTL Architect integration. • Maintain PPRTL expertise and ecosystem positioning; mentor L2 AEs, contribute playbooks, and support sales on adoption and R&D feedback. Required Qualifications • Bachelor's degree in EE, CE, or related field (Master's preferred); 5+ years in EDA, IC design, or low-power applications (or MS + 3 years).
- Hands-on RTL power analysis experience; working knowledge of CGE, glitch, and memory power concepts. • Proficiency with VCS, Verdi/FSDB, SDC flows, and Tcl-based EDA automation. • Demonstrated ability to independently manage customer-facing technical projects. Preferred Qualifications • Direct Prime Power RTL 2.0 deployment experience; RTL Architect/Fusion Compiler and NDM-based flows.
- PrimeTime PX signoff correlation; UPF/IEEE 1801 multi-rail analysis; SoC or AI accelerator designs. • Prior customer-facing AE role at an EDA vendor or semiconductor company.
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