ASIC Engineer, Formal Verification

Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal Verification to build IP and System On Chip (SoC) for data center applications. As a Formal Verification Engineer, you will be part of a team working with experienced engineers across the industry, focused on developing innovative ASIC solutions for Facebook’s data center applications. You will be developing comprehensive formal testplans and be responsible for complete formal verification sign-off of single or multiple complex blocks. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.

ASIC Engineer, Formal Verification Responsibilities:

• Propose, implement and promote the Formal Verification Methodology to be used across the group, both at the top level and at the block level
• Work with Architecture and Design teams to come up with Formal Verification specification and implementation
• Define Formal Verification scope, create Formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level
• Build reusable/scalable environments for Formal Verification and deploying tools
• Evaluate and recommend EDA solutions for Formal Verification

Minimum Qualifications:

• 2+ years of experience in formal verification
• Experience with Formal Verification applications including datapath, sequential equivalence, Xprop, Clock Gating, connectivity etc
• Experience with formal verification methodologies, complexity reduction techniques, and abstraction techniques
• Experience partnering with architecture, design, and validation teams to define formal verification scope and drive sign-off
• Fluency in hardware description languages, such as SystemVerilog and SVA
• Proficiency in scripting languages such as Python, Perl, or Tcl
• Experience with JasperGold or VC-Formal

Preferred Qualifications:

• Experience in formal property verification of complex compute blocks like DSP, CPU, GPU or HW accelerators
• Experience with simulators and waveform debugging tools
• Experience interpreting hardware specifications and extracting design behaviors and properties for formal verification
• Experience with complex SoCs
• Experience with development of fully automated flows from specification to fully verified designs
• Formal verification experience in clock domain crossing, IP-XACT based register verification and low power

About Meta:

Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.

Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.