ASIC Functional Design Verification Engineer

Design Verification Engineer

Company: PQAngels Technologies Pvt Ltd
Experience: 5 -11 Years
Locations: Bengaluru
Employment Type: Full-Time

About PQAngels Technologies

PQAngels Technologies is a product Engineering company built across the Silicon-to-Software stack. Founded by Experienced Engineers, we help customers accelerate innovation through Semiconductor, ASIC, VLSI, Embedded, and Product Engineering services.

Job Summary

We are looking for experienced Design Verification Engineers with strong expertise in SystemVerilog and UVM for ASIC, IP, and SoC verification.

The ideal candidate will be responsible for developing verification environments, creating test plans and testbenches, executing regressions, achieving functional coverage closure, debugging failures, and supporting verification signoff.

Key Responsibilities

• Develop detailed verification plans and test strategies.
• Design and develop reusable UVM-based verification environments.
• Develop and maintain SystemVerilog/UVM testbenches.
• Develop test cases and verification scenarios for IP/SoC-level designs.
• Perform functional coverage analysis and coverage closure.
• Write and implement SystemVerilog Assertions (SVA).
• Perform protocol and interface verification.
• Execute simulations and regression tests.
• Debug RTL and verification issues and perform root cause analysis.
• Analyze simulation failures and work closely with RTL designers for issue resolution.
• Support verification signoff and closure activities.
• Collaborate with RTL Design, Physical Design, and integration teams.
• Participate in design and verification reviews.
• Prepare verification documentation and reports.
• Participate in technical discussions and customer interactions when required.

Mandatory Technical Skills

• Strong experience in SystemVerilog

• Strong hands-on experience in UVM

• Experience with SystemVerilog Assertions (SVA)

• Strong understanding of Functional Coverage

• Hands-on experience in ASIC/IP/SoC Functional Verification

• Experience in Protocol Verification

• Experience with AMBA protocols AXI, APB, AHB

• Experience with high-speed interfaces such as:

• PCIe

• DDR / DDR4 / DDR5

• USB

• Ethernet

• Strong debugging and root cause analysis skills

• Scripting experience in Python / TCL

• Good understanding of ASIC/VLSI design and verification flow

EDA Tools

• Synopsys VCS
• Cadence Xcelium
• Siemens QuestaSim
• Synopsys Verdi

Qualifications

• Bachelor's or Master's degree in Electronics, Electrical Engineering, ECE, VLSI, Microelectronics, or a related field.
• 5-11 years of relevant experience in Design Verification.

Soft Skills

• Strong communication and interpersonal skills
• Excellent analytical and problem-solving abilities
• Strong stakeholder management skills
• Ability to work effectively in global teams
• Good ownership and collaboration skills
• Customer-focused approach

Why Join PQAngels Technologies?

• Opportunity to work on advanced semiconductor and ASIC projects
• Exposure to IP, SoC, and end-to-end verification environments
• Opportunity to collaborate with experienced semiconductor engineers
• Exposure to global customers and challenging projects
• Strong learning and career growth opportunities

Benefits

• Onsite Opportunities
• Fixed Pay
• Health Insurance
• Relocation Assistance