ASIC Validation Sr. Engineer (DDR)

该职位来源于猎聘 Responsibilities:

• Work with ASIC designer to define validation methodology and develop test plans for DDR controllers including DDR PHY and related logics.
• Develop and maintain DDR (DDR5/4, LPDDR5/4) interface training firmware. Develop system DDR validation tests based on SSD SoC and modules.
• SoC DDR interface bring up, characterization & validation test plan execution, data collection and result analysis.
• Work with cross teams to analyze DDR related issues reported by customers, rootcause the issues and improve validation test coverage.
• Work with validation team to complete the DDR AVL testing including Digital SI test and Electrical Compliance Test.
• Lab automation test tool development

Required Experience

• Master or Bachelor’s degree in CS/CE/EE or related engineering discipline.
• Good understanding of protocol and training theory of DDR5/4 and LPDDR5/4.
• Knowledge of embedded systems, ex: ARM/Risc-V CPU,
• Strong programming experience of C, Python and scripts.
• Knowledge of SSD technology, flash technology or storage interface protocols (SATA, SAS, PCIe/NVMe) is a plus
• Familiar with Windows, Linux and Git.
• Experience with lab tools such as oscilloscopes and logic/bus analyzers is a plus
• Oral and written communication skills in both English and Chinese.