ASIC Verification Engineer

Hands-on ASIC Verification
Develop verification test-benches from scratch for ASIC and SoC designs
Develop tests from scratch using SystemVerilog and UVM
Update and maintain existing tests for evolving designs
Develop test-bench components from scratch (drivers, monitors, scoreboards, sequences)
Update and extend existing test-bench components
Develop Verification IPs (VIPs) from scratch
Maintain and enhance existing VIPs
Integrate third-party VIPs into the verification environment
Implement SystemVerilog Assertions (SVA)
Implement functional and code coverage
Analyze coverage results, identify gaps, and create tests to achieve coverage closure

Required Skills & Qualifications
Senior-level experience in ASIC/SoC verification
Strong expertise in SystemVerilog and UVM
Proven experience with:

Test and test-bench development from scratch
VIP development and integration
Assertions and coverage-driven verification

Solid understanding of digital design and verification methodologies
Experience working in Linux-based development environments
Strong communication skills and ability to work in cross-functional, multi-company teams

Meriting Experience
Verification of telecom, networking, or high-speed interface ASICs
Experience with coverage analysis and verification metrics
Familiarity with regression flows and CI environments
Experience mentoring engineers or contributing to team ramp-up

Job Type: Permanent

Pay: 500,00kr - 700,00kr per hour

Expected hours: 40.0 per week

Work Location: In person