ASIC/SoC Verification Engineer

Job Title: ASIC/SoC Verification Engineer - 4-6 Years

Location: Hyderabad

No. Of positions: 1

Work Mode: Onsite

Experience required: 4-6 years

Key Skills & Experience

• Strong experience in Design Verification of complex IPs and SoCs using SystemVerilog and UVM methodologies.
• Expert-level understanding of VCS compilation flows, optimization techniques, and compilation technologies in large-scale verification environments.
• Proven expertise in debugging compilation failures, including complex name-space conflicts, package/import issues, macro redefinitions, file ordering problems, and hierarchy-related errors.
• Solid understanding of RTL and testbench directory structures in large SoC programs, with the ability to quickly identify and resolve integration, dependency, and build-related issues.
• Hands-on experience working with RTL and verification build environments, including Makefiles, compilation scripts, regression setups, and simulation automation.
• Experience supporting and troubleshooting IP integration and SoC assembly flows, addressing compilation, connectivity, configuration, and delivery-related issues.
• Good knowledge of verification infrastructure, testbench architecture, and simulation/debug methodologies.
• Familiarity with version control systems (Git/Perforce) and collaborative development workflows.
• Ability to work closely with RTL, DV, CAD, and integration teams to resolve critical build and verification issues under tight schedules.

Good to have experience

• Experience handling IP/SoC delivery, packaging, and integration challenges across multiple projects.
• Exposure to large-scale SoC verification environments with multiple IP dependencies.
• Strong analytical and debugging skills with a proactive approach to issue resolution

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