ASIC/SoC Verification Engineer

About the Role

Our client in the semiconductor / integrated circuit (IC) industry is seeking a Senior IC Verification Engineer to join theirverification team.

This role is responsible for end-to-end pre-silicon verification activities, covering system-level verification planningthrough tape-out and post-silicon support. The position focuses on digital power IP verification using advancedverification methodologies including SystemVerilog UVM, coverage-driven verification, assertion-based verification,formal verification, and UPF power-aware verification flows .

The successful candidate will work closely with design teams to define verification strategies, improve verificationefficiency through automation, and ensure high-quality verification processes.

Key Responsibilities

Verification Lifecycle Ownership

• Own and execute the complete verification lifecycle from system-level concept through tape-out and post-silicon support.
• Develop and execute verification strategies for digital power IPs.
• Define verification environments, tools, and testing methodologies.

Testbench Methodology Development

• Develop pre-silicon test plans for digital power IPs.
• Build and maintain verification testbenches using SystemVerilog UVM methodology.
• Develop functional coverage models and assertion-based verification.
• Perform formal verification activities including property checking.
• Implement and support power-aware verification flows using UPF .

Design Analysis Collaboration

• Collaborate with product designers to understand functionality and protocol requirements.
• Review product designs to identify potential failure points.
• Develop verification methodologies based on design requirements and risk areas.

Automation Process Improvement

• Develop automation solutions to improve verification efficiency.
• Optimize testing processes and verification workflows.
• Plan and execute structured test sequences and validation activities.

Quality Documentation

• Conduct quality control inspections and verification sign-off activities.
• Prepare final test procedures and documentation.
• Support training and knowledge sharing with QC teams.

Mandatory Requirements

• Strong experience in IC verification, particularly digital verification.
• Experience with SystemVerilog and UVM-based verification methodologies .
• Experience developing verification testbenches and coverage models.
• Experience with assertion-based verification and formal verification concepts.
• Understanding of pre-silicon verification processes.
• Experience collaborating with IC design teams.
• Strong problem-solving and debugging skills.

Preferred Qualifications

• Experience with UPF power-aware verification flows .
• Experience with digital power IP verification.
• Experience developing verification automation frameworks.
• Experience supporting tape-out and post-silicon validation activities.

Work Arrangement & Benefits

• Fully remote position.
• Full-time employee role.

The client is currently planning several initiatives as the company continues to grow:

• Enhanced employee benefits, including upgraded medical, dental, and life insurance coverage.
• Annual performance bonus program (details to be shared in the future).
• Long-term employee stock program.
• Potential international travel opportunities, including China, the United States, and potentially Brazildepending on business needs.

Remote work equipment support:

• Company equipment shipment may be provided, or employees may purchase required equipmentlocally with full reimbursement.
• Potential monthly internet stipend to support remote work.

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