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CCRT Senior FPGA Hardware Engineer

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Onsite

CCRT Senior FPGA Hardware Engineer

ERM Certification and Verification Services Limited

CCRT Senior FPGA Hardware Engineer

Skills

PythonAIWorkday

2 months ago

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Important information


Contract type:

Permanent

Salary:

$115,000 – $130,000 / year

Location:

Pompano Beach, FL, USA

Work mode:

Onsite

Published on:

19 August 2026

What they need


Senior FPGA Hardware Engineer

Concurrent Real-Time is part of HBK’s Virtual Test Division, which focuses on providing real-time software, simulators, and hardware-in-the-loop solutions to virtually test products throughout the development cycle, helping companies accelerate innovation and reduce time-to-market, and improve their competitive advantage. With 250 highly skilled employees, HBK’s Virtual Test Division has offices in Germany, Italy, France, UK, China, Japan, and the USA as well as a broad network of worldwide channel partners. Concurrent Real-Time is the industry’s foremost provider of high-performance, real-time Linux software, hardware and professional services. Our mission is to be the leading provider of best-in-class real-time Linux solutions and support for time-critical applications, and to inspire technological advancements worldwide. For more than 50 years, we have been providing real-time solutions for mission-critical applications worldwide. With offices in 6 countries, our core competencies include:

  • X-in-the-Loop (hardware-in-the-loop, man-in-the-loop and AI-in-the-loop simulation)
  • High-speed data acquisition and signal conditioning
  • Process control solutions
  • High-performance visual systems
  • Low-latency transaction processing

Concurrent Real-Time is currently seeking a full-time FPGA Engineer for the FPGA Workbench Team! This could be a great way to get hands-on experience for your future in tech!

Must be a US citizen. Unable to hire anyone on a visa, green card, or dual citizenship.

About the Role

We are looking for a skilled FPGA Engineer with solid hands-on experience to join our FPGA Workbench team. In this role, you will own the full development lifecycle of FPGA IP modules — from architecture and implementation through verification and deployment — while collaborating closely with software and hardware teams.

What You’ll Do

  • Architect, design, implement, and verify FPGA IP modules for Arria X and Cyclone V platforms
  • Lead debugging and troubleshooting efforts to resolve complex hardware/software integration issues
  • Develop and maintain automated test frameworks using Python and Bash scripts
  • Collaborate with software engineers on API design and integration
  • Produce and maintain comprehensive technical documentation (design specs, test plans, integration guides)
  • Evaluate new tools, methodologies, and approaches to continuously improve team workflows

What We’re Looking For

  • 4+ years of hands-on FPGA development experience Proficiency with HDL languages — VHDL and/or Verilog
  • Strong experience with Intel/Altera toolchains (Quartus Prime, ModelSim)
  • Solid understanding of digital signal processing and hardware design principles
  • Experience writing test and automation scripts in Python or Bash
  • Familiarity with FPGA-to-software interfaces and API integration
  • Bachelor’s degree in Electrical Engineering, Computer Engineering or equivalent experience

Nice to Have

  • Experience with high-speed protocols (PCIe, Ethernet etc.)
  • Experience with aerospace and defense communication protocols such as ARINC 429, ARINC 664, MIL-STD-1553 etc.
  • Experience with Xilinx FPGA
  • Familiarity with embedded C/C++ in FPGA-adjacent systems

Compensation:

The pay range for this position is $115,000 to $130,000 annually plus 10% bonus. Please note that the pay range provided is a good faith estimate for the position at the time of posting. Actual compensation will be dependent on factors, including but not limited to the individual's qualifications, experience, knowledge, skills, and abilities, as well as physical work location within the state.

#LI-CW1

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