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Chip Level Engineer

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Onsite

Chip Level Engineer

Gnr Solution

Chip Level Engineer

Skills

Git

2 years ago

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Important information


Contract type:

Permanent

Location:

Pune, Maharashtra, India

Work mode:

Onsite

Published on:

14 October 2026

What they need


Position Overview:

The Chip Level Engineer will be responsible for the design, simulation, testing, and validation of integrated circuits at the chip level. This role requires a deep understanding of chip architecture, low-level hardware design, and troubleshooting complex systems. The ideal candidate will work closely with other engineers to develop advanced semiconductor solutions and contribute to product development from concept to production.
Key Responsibilities:

Chip Design & Development:
Design, develop, and optimize integrated circuits (ICs) for various applications (e.g., processors, memory, power management).
Create and implement detailed specifications and design documentation for chip-level solutions.
Collaborate with hardware and software teams to define the requirements and ensure smooth integration of chip designs into final products.

Simulation & Modeling:
Perform chip-level simulations to verify functionality and performance of the design.
Use simulation tools (e.g., Cadence, Synopsys, or Mentor Graphics) to validate electrical and logical behavior of chips.
Identify and resolve potential issues early in the design process through effective modeling and simulation techniques.

Testing & Debugging:
Develop test plans and methodologies for validating chip performance and reliability.
Perform debugging of chip-level designs and hardware platforms, using tools such as oscilloscopes, logic analyzers, and signal generators.
Work with the verification team to ensure that the design meets the required specifications and functionality.

Schematic Design & PCB Layout:
Create and review schematics and PCB layouts for chip designs.
Work closely with PCB engineers to ensure the physical design supports the chip functionality and performance.

Process Optimization:
Identify opportunities for optimizing chip designs in terms of power consumption, speed, and cost.
Implement advanced techniques to improve manufacturing yield and product performance.

Cross-Functional Collaboration:
Work closely with cross-functional teams including systems engineers, software engineers, and product managers to ensure timely product delivery.
Provide technical leadership and guidance to junior engineers and team members.

Documentation & Reporting:
Prepare and maintain detailed documentation for chip designs, testing procedures, and results.
Present findings and progress updates to internal stakeholders and customers.

Qualifications:

Education:
Bachelors or Masters degree in Electronics Engineering, Electrical Engineering, or related field.
Additional certifications or training in IC design, VLSI, or semiconductor technologies is a plus.

Experience:
3-5 years of experience in chip-level design, verification, or development.
Hands-on experience with hardware design tools (e.g., Cadence, Synopsys, Mentor Graphics, or similar).
Experience in the design and validation of analog and/or digital integrated circuits.
Familiarity with system-on-chip (SoC) design and architecture is preferred.

Skills:
Strong understanding of digital and analog circuit design principles.
Proficient in hardware description languages (e.g., VHDL, Verilog, or SystemVerilog).
Knowledge of semiconductor physics, CMOS technology, and integrated circuit fabrication processes.
Experience with simulation and verification tools for chip design.
Familiarity with PCB layout and schematic capture tools.
Strong troubleshooting and debugging skills for hardware systems.
Excellent problem-solving abilities and attention to detail.

Technical Competencies:
Proficiency in using hardware debugging tools such as oscilloscopes, logic analyzers, and waveform generators.
Knowledge of design for manufacturability (DFM) principles.
Familiarity with CAD tools and version control systems.
Knowledge of power management, signal integrity, and high-speed digital design is a plus.

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