模拟电路设计主管/经理

该职位来源于猎聘 模拟电路设计主管/经理 要求：电子工程硕士，5年以上模拟电路设计，擅长VCO/PLL/SerDes/Equalizer/Laser Driver/CCD/CIS等任一领域，有chip leader经验；如有带团队经验，优先考虑。 工作地点：上海张江 Responsibilities:

• You will lead your team to design, analyze, and implement high-performance (＞10GHz) PLL, wireline amplifiers, CDR, SERDES, PLL, PAM4, TDCs, TOF, low-noise amplifiers, transmitters, power-amplifiers and power-drivers, or other baseband circuits like LDO, temp sensor, ADC, Filters, etc.
• Use EDA tools (Cadence, Mentor) to run simulation and function verification.
• Guide layout engineer to optimize layout.
• Chip debug and testing individually and with the team.
• Other tasks assigned by line manager. Qualifications:
• MSEE in analog IC design with at least 5 years’ experience
• Hands-on design experience with multi-gigahertz SERDES transmitter/receiver, TIA, PLL, CDR, LNA, ToF, Temperature Sensor, power management IC or low-speed ADC/amplifier
• Good chip leader experience
• Team management skill is a plus
• Experience in Cadence EDA tools
• Team player with good communication skills