Contract Hardware Design Engineer

The Oho Group have partnered with an exciting comapny in the AI space looking for contract hardware engineers to push them to first-generation silicon.

Responsibilities

• Develop and optimize RTL for AI centric hardware subsystems
• Implement micro-architectures focused on datapaths, memory, and performance
• Drive PPA optimization across frequency, power, and area targets
• Lead synthesis, timing closure, and frontend verification
• Collaborate with architecture teams on HW/SW co-optimization for AI workloads

Requirements

• 5+ years in silicon/ASIC frontend design
• Strong RTL expertise in Verilog/SystemVerilog
• Experience with synthesis, timing analysis, verification, and power optimization
• Deep understanding of PPA trade-offs and memory bandwidth optimization (SRAM)
• Proficiency with EDA tools including Verilator, Yosys, and OpenSTA

If you'd be interested in this high ownership, fast-moving and innovative position, get in touch and apply today!