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Defectivity Baseline Engineer

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Onsite

Defectivity Baseline Engineer

STMicroelectronics

Defectivity Baseline Engineer

Skills

Deep LearningData MiningAI

1 month ago

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Important information


Contract type:

Permanent

Location:

Singapore

Work mode:

Onsite

Published on:

15 September 2026

What they need


OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the hidden foundation of the world we live in today. When you join ST, you will be part of a global business with more than 122 nationalities, present in 40 countries, and comprising over 49,000 diverse and dedicated creators and makers of technology around the world. Developing technologies takes more than talent: it takes amazing people who understand collaboration and respect. People with passion and the desire to disrupt the status quo, drive innovation, and unlock their own potential. Embark on a journey with us, where you can innovate for a future that we want to make smarter and greener, in a responsible and sustainable way. Our technology starts with you. The Job

  • Responsible for identifying, analysing OOC lots, Defect Pareto, defect trend and characterization data to determine the source of defect and drive for yield improvement.
  • Perform defect characterization and defect source analysis for equipment or defectivity baseline improvement.
  • Responsible for setting up, optimizing and maintaining Defectivity Product sampling and control limits.
  • Lead the troubleshooting of defectivity alert and involve in Material Review Board for material assessment and disposition.
  • To work closely with cross functional teams (process/equipment/device/quality) on Quality/Productivity improvement Programme for defectivity improvement activities.
  • Opportunity to involve in deployment of Advanced Defectivity Monitoring system project involving AI, Convolution Neural Network (CNN) and deep learning with DIT and cross-functional team,

Requirements

  • Degree in Material Science/Electrical/Electronics/Microelectronics/Mechanical/Physics/Chemistry.
  • Preferred minimum 3 years working experience in semiconductor wafer fabrication industry and good knowledge in Defectivity methodology and knowledge of Defectivity inspection tool. Fresh graduate is welcomed to apply as well.
  • Ability to lead and participate in cross functional problem-solving teams and with good interpersonal skills.
  • Knowledge in Klarity Defects/AceXP/Space/Spotfire and other Defectivity related tool will be an added advantage.
  • Familiar with SPC concept and other problem-solving tools: SPACE, FMEA, 8D, Data mining analysis and AI base on Convolution Neural Network (CNN) will be advantageous.
  • Self-driven and independent with an inquisitive mind.

ST is proud to be one of the 17 companies certified as a 2026 Global Top Employer and the first and only semiconductor company to achieve this distinction. ST was recognized in this ranking thanks to its continuous improvement approach and stands out particularly in the areas of ethics & integrity, purpose & values, organization & change, business strategy, and performance.

At ST, we endeavor to foster a diverse and inclusive workplace, and we do not tolerate discrimination. We aim to recruit and retain a diverse workforce that reflects the societies around us. We strive for equity in career development, career opportunities, and equal remuneration. We encourage candidates who may not meet every single requirement to apply, as we appreciate diverse perspectives and provide opportunities for growth and learning. Diversity, equity, and inclusion (DEI) is woven into our company culture.

To discover more, visit st.com/careers.

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