Design and Verification Engineer

Job highlights

• Experience in IP/SOC Verification with Verilog, System Verilog, UVM testbench coding and protocol knowledge (PCIe, Ethernet, CXL, USB, CAN, LIN, FlexRay, AXI, AHB, APB)

• Perform design and verification failure debugging, testcase planning, functional coverage development, and assertion/checker development

• Hands On Experience, in IP/SOC Verification.

• Have Experience of one or more Project Cycles including Tape Outs

• Design & Verification Failure Debugging Skills

• Verilog, System Verilog, & UVM Testbench Coding

• Functional Coverage Development, & Coverage Closure

• Assertion/Checker Development

• Testcase Planning & Development

• Practical Knowledge of Protocols like: PCIe, Ethernet, CXL, USB, CAN, LIN, FlexRay, AXI, AHB, APB

• Concepts in Digital Design

• Problem Solving & Analytical Skills