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Design Verification

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Onsite

Design Verification

Acesoft Labs

Design Verification

Skills

Python

1 month ago

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Important information


Contract type:

Permanent

Location:

Hyderabad, Telangana, India

Work mode:

Onsite

Published on:

18 September 2026

What they need


Description:

As a Design Verification Engineer, you will work with a highly innovative and motivated design team using state of the art memory technologies to develop the most advanced DRAM and Emerging memory products. You will be challenged by the complexity and difficulty of verifying high density memory chips (up to 32Gb) with huge scale of circuit capability (over 4M transistors), ultra-high-speed designs, complex functionality which includes next Generation DDR/LPDDR (ex: DDR5, LPDDR5) and advanced low power and power management technologies. You will need to have the ability to work as a Design Verification Engineer, to evaluate Full chip or block level functionality and provide solutions to help delivery of functionally correct design. You will work closely with Micron's various design and verification teams all over the world to contribute to the success of the design projects by applying verification tools and techniques, providing verification status and summaries to specific designs as needed.

Responsibilities will include, but not limited to:

Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.

  • Good knowledge of Basic Analog/Digital concepts.

  • Good knowledge of Verilog/SV concepts.

  • Experience in using spice simulation and digital simulation tools like Virtuoso, primesim, Finseim, Hspice, Xcellium, Simvision, Waveview.

  • Experience in understanding Spice simulation environment/Digital simulation environment, able to debug analog/digital design related issues.

  • Work experience in co-sim simulation designs is a plus.

  • Good scripting skills using perl, python is a plus.

  • Must possess good communication skills and ability to work well in a team.

Bachelor's with 2+ years of work experience or Post Graduate Degree in Electronics Engineering or related engineering field with 1-2 years of working experience is required.

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