Design Verification Engineer

Why Ambit

Are you up for a career that throws challenges and at the same time gives you a sense of pride in what you do? Ambit offers it’s people the ideal platform to toil and grow in the semiconductor design profession. Our people have complete freedom to operate in their own flexible ways and support that help them to learn and enhance their skills further. Ambit firmly believes that for a company to grow big through innovation, its people must be given a free hand to experiment and innovate. The cheerful and bubbly work environment at Ambit portrays the commitment of the management for its people and their values. Come join us today for a bright future in semiconductor design services.

Qualification:

B.Tech / M.Tech or equivalent from a reputed University

Experience:

5 - 8 years of relevant experience

Job Description:

• Experience in the verification of IP cores.
• Must have proven experience in developing HVL (System Verilog/UVM) based test environments, developing and implementing test plans, implementing and extracting verification metrics such as functional coverage and Code coverage.
• Experience on DDR Protocol is necessary. Understanding BIST would be an added advantage.
• Familiarity with HDLs such as Verilog and scripting languages such as shell/Perl/Python etc. is highly desirable. Good communication skills, debug and problem-solving skills, mentoring teammates and should be self-motivated.
• Be a technical contributor in the Verification Tasks – System Verilog/Verilog coding of testbenches, Test cases, performing verification tasks such as coverage, debug, regressions using the latest methodologies such as UVM.
• Creates deliverables which do not require close review or supervision by a Senior Technical Engineer.
• Be able to study the coverage metrics and improve them with definition of additional test cases in directed environment, at least for small/ medium complexity features of the protocol/ product specs.