Design Verification Engineer

Design & Verification Training Engineer... Location Flexible #7878

Virtual with travel as needed... Could training be the next direction in your career path for Verification? Become an industry expert training others....

My client is the leading independent training company serving the semiconductor design and verification marketplace. This fast growing yet boutique style training company is headquartered in Silicon Valley and offers technical custom training sessions. They need an experienced ASIC/FPGA design & verification technical leader to join their fast-paced team-oriented environment where you can make a positive impact on their clients and business. You will have the opportunity to develop training curriculum sessions and then effectively engage an audience and present complex engineering topics.

This is no ordinary engineering role, but rather an opportunity to raise your visibility in the design and verification community and develop “guru” status among your peers. This is a great way for your reputation to grow. You will be helping others gain knowledge of complex topics such as VHDL, Verilog, SystemVerilog, UVM, SystemC, TLM, Formal and other emerging design and verification languages and application methodologies through instructor led classroom and virtual training venues.

Job Description

• Design and develop training courseware for new service offerings.
• Deliver all product and service training via classroom or virtual style and/or webinar.
• Provide customized training to meet client requirements.
• Maintain all developed courseware and tutorial scripts as necessary.
• Travel to customer sites (mostly) within North America.
• Sustain your knowledge at the leading edge of hardware/systems design/verification languages/tools/methods to gain the respect of our most proficient clients.
• Involvement in technical marketing activities and technical support to the sales process

Key Requirements (Not all skill sets required)

ALL CANDIDATES MUST HAVE expert-level knowledge and experience in ASIC/FPGA design and verification using SystemVerilog & UVM.

• IDEAL candidate also has expert level knowledge and experience in ASIC/FPGA design and verification using VHDL and/or Formal and have experience in providing classroom training and/or digital design or verification
• consulting services.
• ALL CANDIDATES MUST be enthusiastic and experience personal satisfaction when they have been able to
• successfully transfer their knowledge and skills by lectures and labs to a classroom of adult students who have
• bachelor’s degrees or higher in either electrical engineering or computer science
• Excellent communication skills are a must. Clear, articulate communicator who expresses confidence and is
• adept and enthusiastic about elevating the knowledge of their students.
• Excellent professional written, verbal and presentation communication skills with the ability to interact with
• internal and external clients at all staff levels.
• Experienced using tools from Cadence, Siemens EDA, and Synopsys
• Capable of impressing customers in pre-sales, training, and technical presentation situations
• Estimated level of travel is 25%
• Bachelor of Science Degree in Electrical Engineering or Computer Science, MS preferred

For more information, contact:

Mark Gilbert, [email protected],

305-598-2222 x3