Design Verification Intern

• As a Design Verification intern, you will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready
• You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack
• We are looking for Fall ‘26, Spring ‘27, and Summer ‘27 interns

Benefits

• Competitive Salary and Equity - We offer a competitive salary and equity package that aligns with industry standards
• Benefits - Your wellbeing is important to us. We offer unlimited PTO, life insurance, and a 401(k)
• Full Insurance Coverage - Our insurance includes full medical, dental, and vision with 100% of premium covered- We encourage you to apply even if you do not believe you meet every single qualification
• Familiarity with transformer models and machine learning
• UVM or formal verification experience
• Familiarity with high-speed digital logic
• Are able to learn quickly about transformers and other aspects of modern artificial intelligence
• Exposure to ASIC or SoC design concepts
• Familiarity with verification work and writing test benches
• Familiarity with physical design flows and tooling
• This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges
• Familiarity with SystemVerilog, UVM, or Python
• Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field
• ​Ability to program with Python or another scripting language