DFT Engineer - Sub Lead

DFT Engineer - Sub Lead

DFT Engineer - Sub Lead (5+ yrs) - Bangalore

Responsibilities

Implement DFT features for IPs/SoCs

Generate and debug ATPG patterns

Support DFT verification and sign-off

Collaborate with PD and DV teams Skills

Scan, ATPG

Tessent / Synopsys tools

Fault coverage analysis

Work Mode :

Full-time

Job :

Semi Conductor

Location :

Bangalore

Years of Experience :

5+

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