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Bitsilica
DFT Lead Engineer
2 months ago
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Important information
Contract type:
Permanent
Location:
Bengaluru, Karnataka, India
Work mode:
Onsite
Published on:
4 September 2026
What they need
Role & responsibilities
- 8 to 10+ Years of experience in DFT architecture, scan Insertion, and compression at the core level and SoC level.
- Experience in ATPG pattern generation and coverage analysis
- Experience with timing and no-timing simulations
- Experience in Memory-BIST
- Have an understanding of SSN architecture, clock architecture, and OCC
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