DFT Pattern Professional

Job Summary

The Role: As a member of the S3 SoC Pattern Team, the successful candidate will own/lead the Pattern verification activities on complex SOC. These SOCs are among the biggest in the market with billions of transistors, consisting of AMD's high performance X86 cores, graphics, data fabric and many IPs such as USB, PCIe.

Strong self-driving ability and should have excellent communication skills (both written and oral).

Strong problem-solving skills.

Responsibilities

• Candidate is responsible for verifying and delivering patterns to Product Engineering team for silicon validation.
• Candidate is responsible for taking the test sequence from IP and porting it to SOC, running and verifying it at SOC, debug any fails/issues seen and deliver the passing patterns to Product Engineering.
• Must have good knowledge on the verification flows and tools such as VCS, Verdi.
• Must have hands in experience with AMBA, HSIO, IEEE 1149.1, IEEE 1678, IEEE 1500 protocols.
• Excellent hands-on debug skills and problem-solving attitude.
• Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC.
• Experience of working on Functional Verification, SoC Verification, Emulation.
• Good in programming, System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language.
• Must have good communication skills and the ability to work in a team environment.
• Preferably having experience in architecture such as x86 or ARM domain based SOCs.
• Experience with CReST, PCIE, DDR is desired but not essential.
• This position requires minimum of 10 to 15 years of experience.

Academic Credentials

• Bachelor's or Master's degree in Computer Engineering/Electrical Engineering

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