E
Eliyan
Digital Design Engineer
Skills
Compliance
2 months ago
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Important information
Contract type:
Permanent
Location:
Vancouver, BC, Canada
Work mode:
Onsite
Published on:
29 August 2026
What they need
- As an Eliyan digital designer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility
- You will be developing micro-architecture specifications and RTL design descriptions for best-in-class PHYs and Controllers
- You will work with a cross-functional team of experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products
- Design, develop and/or integrate Ethernet PCS/PMA IPs for various data rates (100/200/400/800G)
- Develop micro-architecture specifications and implement digital designs using SystemVerilog
- Ensure compliance with Ethernet standards (IEEE 802.3)
- Optimize designs for power, area, and performance
- Collaborate with verification engineers for IP verification
- Work closely with physical design team for physical implementation
- Participate in design reviews and ensure design quality
- Develop and maintain all IP design collaterals that include documentation, RTL, SDC constraints, power intent definition (UPF/CPF), LINT/CDC rule files and waivers
- Stay up to date with industry trends, emerging technologies and progress in standards’ bodies- Experience integrating 3rd party mixed signal IPs
- Bachelors or Masters or Ph.D in Electrical Engineering and related fields, or equivalent
- Strong bias for innovations across all aspects of digital design including automation of mundane activities and methods for quality improvement
- Knowledge of DRAM Controllers/PHYs and HBM Memory a plus
- Proficiency in taking RTL through synthesis and produce a PPA optimized frontend netlist
- Strong expertise in RTL and Assertion coding with SystemVerilog
- 5+ years of experience in high-speed digital design (preferably in retimer, gearbox, Ethernet PMA/PCS logic)
- Proven track record of being part of a start-up like environment
- Knowledge of Ethernet 802.3 standards’ clauses related to 100G/200G/400G/800G, Auto-Negotiation and Link Training
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