Digital IC integrated design engineer

• Flagship Smartphone chip integration 2. Automotive SoC chip integration 3. Clock architecture 4. Timing constraint and analysis 5. DFT/test mode implementation

Main Requirements and Qualifications

• 1. Experience with RTL design, integration(SOC and IPs) and verification
• 2. Knowledge of STA, timing constraint and timing concept about advance nodes
• 3. Experience with EDA tools and scripting languages (Perl, Tcl) used to build tools and flows for complex environments
• 4. Experience with communicating across functional internal teams and vendors.
• 5. Experience with DFT and test mode