DV Engineer (DDR, PCIE, Ethernet)

Job Title: DV Engineer (DDR, PCIE, Ethernet) - 4-6 Yrs

Location: Hyderabad

No. Of positions: 1

Experience required: 4-6 Years

Job Duties:

• Participate in the functional verification of a block(s) or sub system of complex ASICs and/or IP cores.
• Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system.
• Expertise working on any atleast one high speed protocol like DDR, PCIe, Ethernet etc.
• Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation.
• Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.
• Be familiar with hardware modeling and/or assertion-based verification methods.

Required Skills:

• 4-6 years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting
• Strong background in C based development in a Linux Environment
• Strong debug skills and Knowledge of Perl and Makefiles
• Experience in Verilog/SystemVerilog and UVM; Strong analytical skills and attention to detail
• Excellent written and communication skills.

Primary Skills:

• Functional verification using System Verilog & UVM testbenches
• 4-6 years of experience required

Secondary Experience:

• High speed protocols like DDR, PCIE, Ethernet

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