Engineer, PCB Layout Design, meoSphere

Requisition Number: 20117

Contract Type: Permanent

Location(s):

Betzdorf, LU

Engineer, PCB Layout Design, meoSphere The job responsibilities outlined in this document are not exhaustive and may evolve over time and be reviewed according to business needs.

Role Description Summary We are seeking a highly energetic PCB Layout Design Engineer to play a central role in the design and optimisation of advanced satellite payloads. This position requires expertise in high speed digital, and sensitive RF PCB design including stackup definition, technology selection, part reliability knowledge and PCB/PCBA manufacturing for signals up to 30GHz.

As part of an agile, international team, you will work closely with electrical, mechanical engineers, PCB manufacturing houses, procurement and manufacturing counterparts to ensure mission success. Adaptability, strong collaboration skills, and a problem-solving mindset are essential to thrive in this role.

Primary Responsibilities / Key Result Areas PCB Design

• Implement controlled‑impedance RF transmission lines (microstrip, stripline, CPWG) with precise geometry and dielectric modelling.
• Optimize RF path length, symmetry, and isolation to minimize loss, reflections, and phase imbalance
• Integrate antennas (chip, PCB trace, patch, loop) with proper clearance, ground tuning, and keep‑out zones
• Collaborate with other engineers to validate S‑parameters, insertion loss, and return loss
• Generate fabrication notes for RF stackups, materials and tolerances
• Route high‑speed interfaces (PCIe, DDRx, RFFE, 112G SERDES)
• Manage via transitions (back‑drilling, blind/buried vias, via‑in‑pad) to reduce reflections and stubs
• Design power distribution networks (PDN) with guidance

Qualifications & Compentencies

• Bachelor’s or Master’s degree in Electrical Engineering, or Physics.
• 2+ years of experience in PCB layout design.
• Experience with Altium Designer (preferably Altium 365/Agile)
• Experience with high speed PAM4 signalling
• Experience with DDR4 or other high speed parallel buses where timing is critical
• First principles thinking
• Experience with manufacturing technologies and bottlenecks (lamination cycles, copper types, dielectric types and uses)
• Understanding of Power Delivery Networks and transmission line theory
• Experience with RF layout considerations
• Nice to have: Experience with NewSpace development approaches.
• Fluency in English; other languages are considered an asset.

Other Key Requirements / Comments

• The candidate must be eligible for a “SECRET” security clearance, in accordance with the national regulations as well as EU/ESA/NATO equivalents
• Willing to work at least 60% onsite from office
• Travel as required for project realization purposes

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