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Engineering Program Manager (RISCV)

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Onsite

Engineering Program Manager (RISCV)

Tenstorrent

Engineering Program Manager (RISCV)

2 months ago

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Important information


Contract type:

Permanent

Salary:

$100,000 – $500,000 / year

Location:

Austin, TX, USA

Work mode:

Onsite

Published on:

21 October 2026

What they need


  • Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities

  • We’re looking for a driven Engineering Program Manager—or a hands-on technical lead ready to step into program management—to help lead the charge on our RISC-V CPU team

  • In this role, you’ll be at the center of the action, working across architecture, design, verification, physical design, and DFT to drive the full lifecycle of a high-performance CPU—from spec to tapeout to post-silicon debug

  • You’ll partner with key stakeholders to define bold objectives, lock in milestones, and align the resources needed to bring next-gen compute to life

  • Ownership of full-cycle CPU program management—from spec to tapeout and post-silicon debug

  • Ability to define scope, schedule, and resources, and lead execution across architecture, design, verification, and DFT teams

  • Proven experience driving silicon development, managing risk, and delivering milestones

  • Experience with Functional Safety (FuSa) standards and implementation, especially ISO 26262 and an understanding of automotive industry requirements and standards for hardware development is highly desirable

  • How to lead the delivery of cutting-edge RISC-V CPU IP at scale, both internally and for external customers

  • Partnering with top engineers to resolve real-time design challenges, drive schedule trade-offs, and push forward high-impact decisions

  • Leading project reviews and reporting to senior leadership on metrics, risks, and mitigation plans

  • A clear communicator who can engage engineers and executives alike

  • A technically strong leader with experience in CPU, SoC, or silicon development

  • Proactive problem solver who thrives in dynamic, fast-paced environments

  • Skilled in aligning cross-functional teams to deliver complex, high-performance hardware programs

  • This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology

  • We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting

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