Failure Analysis Engineer

1 year contract + extensions

onsite in San Jose

Pay Rate: $65-69/hr

Job Title

ASIC Failure Analysis Engineer, EE background, Semiconductors,

Job Description

As a Failure Analysis Engineer, you will be part of the Quality and Reliability group, performing failure analysis of ASIC products. Should have a passion for problem solving and a strong technical background in semiconductor failure analysis techniques and root cause analysis.

This role will require high level of collaboration and interaction with Product Test Engineering, Design Engineering, Quality Engineering, Assembly Engineering and Foundry Engineering teams.

The successful candidate must be able to work well within a team and have excellent communication and organizational skills.

Experience with a variety of semiconductor failure analysis techniques and test equipment is required, along with the ability to interpret results and provide clear guidance on causes of failure.

Responsibilities

• Conduct root cause failure analysis of silicon product reliability test and field failures and propose corrective actions.
• Develop and implement standard processes for failure analysis using all types of FA equipment.
• Coordinate all the logistics and instructions to direct the failure analysis process and carry out FA function in a systematic way.
• Document and report failure analysis results to management.
• Function as a technical resource for failure analysis questions.
• Develop and maintain relationships with FA service and equipment vendors.

Requirements

Minimum

• Bachelors degree in Electrical/Electronics Engineering or related required. Masters preferred.
• 10+ years of experience in semiconductor failure analysis field.
• Proven ability to write and execute FA plans and interpretation of results from FA techniques such as: cross section, X-ray, CSAM, TDR, FIB, SEM, and TEM, IR/EMMI/OBIRCH
• Proven ability to specify hardware and implement set up for dynamic FA using SIL (Solid Immersion Lens) and LSM (Laser Scanning Microscopy).
• Working knowledge of fault isolation techniques using ATE, Scan/ATPG, MBIST.
• Design-based fault isolation, physical, electrical, and optical techniques to isolate, identify, and characterize device-level faults.
• Semiconductor technology and process knowledge (Fab, Assembly, and Advanced Packaging).
• Interface with product, test, and design engineering groups to identify and characterize faults on emerging technologies, while providing fault isolation, identification, and characterization for yield/reliability failures.
• Good understanding of transistor functions and basic electronics.
• Knowledge of JEDEC IC Qualification tests and requirements is beneficial.
• Strong understanding of semiconductor device physics and behavior under various operating conditions
• Experience with semiconductor frontend fabrication, backend assembly, wafer testing, and discrete component failure analysis
• In-depth knowledge and direct experience of semiconductor Logic and Memory wafer fabrication technology and process flow
• Proven experience driving physical failure analysis with suppliers and improving manufacturing processes Innovative and Creative with troubleshooting techniques.
• Enjoy hands-on work and working in a lab environment.
• Good customer and vendor management skills.
• Ability to work well in cross-functional teams in a fast-paced, collaborative team environment.
• Ability to work independently, multi-task, and pay good attention to details.