Firmware Engineer-IP Diagnostic

该职位来源于猎聘 薪资面议 THE ROLE: The IO Diagnostic Engineering team is responsible for delivering diagnostic test suites for AMD instinct GPUs and Epyc CPUs, which test the leading industry high-performance I/O interconnects IP subsystems and OS supporting IP subsystems. We understand the features that go into the hardware design, and we have the software skills to program them to life. These diagnostics support the entire product lifecycle, from pre-silicon validation through production. THE PERSON: The ideal candidate is a strong team member who is results-oriented in a fast-paced engineering environment. You bring strong software development fundamentals, excellent communication skills, and the ability to work effectively across silicon design, firmware, platform and program teams.

Key Responsibilities As an IO Diagnostic Engineer, you will work with a cross-functional organization to plan, develop test content, validate and automate test for AMD’s cross-BU programs.

• Forward thinker to improve development processes, code quality and hardware coverage.
• Transfer high level requirements into comprehensive diagnostic test coverage with desired coverage metrics, and detailed diagnostic test items.
• Pre-silicon work includes developing diagnostic test contents, verifying critical features on emulation environments for reducing risk of post-silicon work.
• Post-silicon work includes silicon bring up, all features test execution, issues debugging, and optimizing test time without sacrificing the test coverage.
• Be a driver of continuous improvement of enhancing diagnostic coverage, code quality, and development processes.
• Drive test innovation and strategic initiatives based on learning from prior programs and your own best practice knowledge. PREFERRED EXPERIENCES:
• BS + 8 years or MS + 6 years of working experience in software or firmware development.
• Experience in large-scale system software development on Linux and system-level verification and debugging.
• Proficiency in programming/scripting languages (e.g., C/C++, Perl, Ruby, Python).
• Hands-on experience with ASIC bring up is an asset.
• Knowledge of high-speed IO or virtualization technologies (PCIe, DMA, IOMMU/VT-D, etc.), and hands-on experience with PCIe products and protocol analyzer is a good plus.
• Good knowledge of x86/ARM architecture and experience with BIOS, GPU, PCIe and external high-speed interconnect buses.
• Ability to closely interact with HW designers/architects and internal engineering teams to solve functional HW/SW issues.
• Has strong analytical thinking and problem-solving skills with excellent attention to details.
• Must be a team player but also be able to work efficiently with minimal supervision.
• Good communication skills and be proficient in written and spoken English. ACADEMIC CREDENTIALS:
• Bachelor’s or master’s degree in Computer Science, Computer/Electrical Engineering, or equivalent.
• Master’s Degree preferred. LOCATION: Zhangdong Road, Shanghai, China