FPGA Design Engineer

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Job Location (Full Address): 250 East River Rd, Rochester, New York, United States of America, 14623

Opening Worker Subtype:

Regular

Time Type Full time

Scheduled Weekly Hours 40

Department 250548 LLE-Laboratory for Laser Energ

Work Shift UR - Day (United States of America)

Range UR URG 112

Compensation Range $70,600.00 - $105,800.00

The referenced pay range represents the minimum and maximum compensation for this job. Individual annual salaries/hourly rates will be set within the job's compensation range, and will be determined by considering factors including, but not limited to, market data, education, experience, qualifications, expertise of the individual, and internal equity considerations. Responsibilities The Laboratory for Laser Energetics (LLE) of the University of Rochester is a unique national resource for research and education in science and technology focusing on using lasers to initiate fusion and high energy density physics.

The LLE Electronics and Controls Engineering group has a broad portfolio of custom embedded electronics and consumer off the shelf (COTS) products deployed across the lab. We are seeking an experienced FPGA design engineer to aid in the development of new solutions and support of the exiting install base of devices across the facility. The successful candidate should have a BSEE/BSEET and 3 years of experience or equivalent training and experience.

Requirements

• Strong working knowledge of VHDL coding
• Experience with RTL simulation
• Familiarity with circuit design, development, and troubleshooting

Desired Skills Or Experience Includes

• Experience with AMD/Xilinx Vivado or ISE
• Familiarity with high-speed transceivers used in PCIe or fiber optics
• Embedded programming in Linux
• CAD schematic capture

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