FPGA RTL Design Engineer

Job Title: FPGA RTL Design Engineer (3-5 Years)

No. Of Positions: 3

Work Location: Bangalore

Role Overview

We are seeking a skilled and motivated FPGA RTL Design Engineer with 3 to 5 years of experience to drive the architecture, design, and implementation of high-performance FPGA-based systems. In this role, you will work closely with verification and system architecture teams to deliver robust, timing-closure-friendly RTL code for cutting-edge hardware products.

Key Responsibilities

1. RTL Design & Development: Write clean, modular, and synthesizable Verilog/SystemVerilog RTL code for complex FPGA sub-systems and IP blocks.
2. Protocol Implementation: Design and integrate standard communication interfaces including AMBA (APB, AHB, AXI), Ethernet, and low-speed serial protocols (I2C, SPI, UART).
3. Timing Closure & Optimization: Perform synthesis, place-and-route (P&R), and timing closure using vendor toolchains (Xilinx/AMD Vivado, Intel Quartus). Optimize designs for area, power, and high-frequency performance.
4. Integration & Debug: Collaborate with verification engineers to debug simulation failures and perform on-board lab testing/debugging using logic analyzers, ChipScope/ILA, and oscilloscopes.
5. Documentation: Maintain comprehensive micro-architecture specifications, design documentation, and peer-review records.

Required Qualifications & Skills:

1. Experience: 3 to 5 years of hands-on FPGA design and hardware development experience.
2. Languages: Expert proficiency in Verilog and SystemVerilog (VHDL is a plus).
3. Bus Protocols: Strong understanding and implementation experience with AMBA APB, AHB, and AXI4/AXI-Stream protocols.
4. Networking & Serial Interfaces: Experience working with Ethernet MAC/PHY interfaces and serial protocols (I2C, SPI, UART).
5. EDA Tools: Proficiency in AMD/Xilinx Vivado, Intel Quartus Prime, Git version control, and scripting languages (Python/Tcl).

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.