C
CesiumAstro
FPGA Verification Engineer
Skills
PythonMATLABLinuxProcess Improvement
2 months ago
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Important information
Contract type:
Permanent
Salary:
$118,000 – $142,000 / year
Location:
El Segundo, CA, USA
Work mode:
Onsite
Published on:
4 September 2026
What they need
- We are looking to add an FPGA Verification Engineer II to our team. If you enjoy working in a startup environment and are passionate about developing leading-edge phased arrays for satellites, spacecraft, and aerospace systems, we would like to hear from you
- Contribute to the evaluation and technical implementation of FPGA and digital design simulation, verification and emulation infrastructure
- Contribute to the development, maintenance and phased deployment of continuous integration and regression testing infrastructure
- Develop state-of-the-art UVMf-based top-level and module-level testbenches using block-to-top best practices for reusability, including both control and data plane stimulation using VIP & System Verilog DPI-C integration with existing MATLAB and Python numerical models
- Lead the development of reusable custom VIP modules
- Work closely with the engineering and senior leadership teams to train and mentor engineers at all experience levels on UVMf testbench usage and modern approaches to FPGA/digital design. Work with the modeling and scientific staff to implement DPI-C dataplane verification interfaces into existing MATLAB and Python models
- Aid the Lead Verification Engineer in evaluating current processes regarding FPGA and digital design with a focus on Xilinx TLM models and QEMU-RP integration
- Work closely with vendors to define requirements of future simulation model deliverables
- Maintain up-to-date knowledge of industry best-practices regarding FPGA and digital design methodologies
- Work closely with the engineering leadership team to evaluate and non-disruptively implement process improvements
Benefits
- Health, dental, vision
- HSA and FSA
- Company stock options
- Life, disability and retirement plans- Knowledge of FPGA digital design verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP
- Understanding of digital design automation infrastructure, including CI, regression testing and HIL testing
- A Bachelor of Science (BS) or Master of Science (MS) degree in Computer Science, Electrical Engineering, or Computer Engineering
- Knowledge of vendor-provided FPGA development tools with a focus on Xilinx tools
- Competency with Linux
- Minimum of 2 years of industry experience in verification and automation
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