Fresh Graduate EE Engineer

Role: Fresh Graduate EE Engineer in different domains

Open to local Malaysians only

Job Description – SIGNAL/POWER INTEGRITY ENGINEER (FRESH)

Location: Bayan Lepas, Penang only

• Support SI/PI simulations using tools such as HSPICE, Sigrity PowerDC, and PowerSI .
• Assist in analyzing PCB and package power delivery networks (PDN).
• Learn to generate and evaluate S-parameter models .
• Support power plane analysis and PI modeling activities.
• Prepare simulation reports and technical documentation.

Requirements

• Bachelor's Degree in Electrical & Electronics Engineering, Electrical Engineering, Mechatronic Engineering, or related fields.
• Basic understanding of electronics, PCB design, circuits, or electromagnetics.
• Exposure to simulation tools (HSPICE, LTSpice, ADS, Cadence, SIWave, etc.) is an advantage.
• Good analytical, problem-solving, and communication skills.
• Fresh graduates with relevant projects, internships, or coursework are encouraged to apply.
• Communication skill in Mandarin is an added advantage.

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Job Description – VALIDATION ENGINEER (FRESH)

Location: Bayan Lepas, Penang & Kulim Kedah

• Assist in executing validation test cases and test plans.
• Support data collection, test result analysis, and documentation.
• Participate in debugging hardware and software issues with guidance from senior engineers.
• Collaborate with cross-functional teams to support validation activities.
• Assist in developing or enhancing automation scripts and tools.
• Prepare test reports and communicate validation progress.

Requirements:

• Bachelor's Degree in Electrical & Electronics Engineering, Mechatronic Engineering or a related field.
• Basic understanding of computer architecture and operating systems.
• Strong analytical and problem-solving skills.
• Good communication and teamwork abilities.
• Eagerness to learn and explore new technologies.
• Communication skill in Mandarin is an added advantage.

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Job Description – PHYSICAL DESIGN ENGINEER (FRESH)

Location: Bayan Lepas, Penang only

• Assist in synthesis, floor planning, placement, CTS, and routing.
• Perform timing analysis, power optimization, and physical verification DRC/LVS checks.
• Collaborate with design and DFT teams for successful tape-out.
• Support on documentation and report design progress, metrics and issues.

Requirements:

• Degree in Electrical/Electronic Engineering or Microelectronics.
• Understanding of digital logic fundamentals, including logic gates and circuit timing.
• Basic knowledge of VLSI design flow and scripting (TCL/Python/Perl).
• Familiarity with EDA tools (Synopsys/Cadence) is an advantage.
• Strong analytical and teamwork skills; eager to learn.
• Communication skill in Mandarin is an added advantage.
• Graduates who are currently/has completed training under ASEM / PSDC VLSI programs has added advantage.