HCLTech
GLS Verification Engineer
Skills
2 months ago
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Important information
Contract type:
Permanent
Location:
Bengaluru, Karnataka, India
Work mode:
Onsite
Published on:
3 September 2026
What they need
Overview of the Role
The GLS Verification Engineer will play a pivotal role in verifying and validating GLS (Gate Level Simulation) flows for complex semiconductor or system designs. This position is crucial in ensuring the functional accuracy, performance, and reliability of advanced technology solutions delivered to HCLTechs global clientele. The role involves close collaboration with cross-functional engineering teams to deliver high-quality products that uphold HCLTechs standards of excellence and innovation.
Detailed Responsibilities
- Develop and execute comprehensive GLS verification plans, ensuring full coverage for assigned modules or projects.
- Create, maintain, and optimize GLS test benches, simulation environments, and verification infrastructure.
- Analyze and debug functional and timing issues at the gate level, collaborating with design and implementation teams to resolve discrepancies.
- Perform regression testing, document results, and track issues to closure.
- Review and interpret design specifications, RTL code, and synthesis reports to align verification efforts with design intent.
- Participate in design and verification reviews, contributing technical insights and recommendations.
- Support sign-off activities by generating verification reports and metrics for project stakeholders.
- Stay updated on industry best practices, tools, and methodologies in GLS verification and contribute to process improvements.
Skill Requirements
- Bachelors or Masters degree in Electronics Engineering, Computer Engineering, Electrical Engineering, or a related discipline.
- Proven experience in GLS (Gate Level Simulation) verification within the semiconductor or technology industry.
- Strong proficiency in HDL languages (Verilog, SystemVerilog, or VHDL).
- Hands-on expertise with industry-standard EDA tools for simulation, waveform analysis, and debugging (e.g., Synopsys VCS, Cadence Incisive/Xcelium, Mentor Questa).
- Solid understanding of digital design, synthesis, static timing analysis, and related concepts.
- Excellent analytical, problem-solving, and troubleshooting skills.
- Effective communication and teamwork abilities.
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