GPGPU Digital IC Design Engineer

General Purpose GPU Digital IC Design Engineer

Primary Responsibilities:

     1.         Analyze product requirements for high-performance computing chips and participate in defining the micro-architecture and specifications for GPGPU chips.

     2.         Design, implement, and optimize RTL for key modules, including compute units (e.g., SIMD Cores, Tensor Cores), scheduling subsystems, on-chip memory subsystems, and interconnect networks.

     3.         Write high-quality, synthesizable Verilog/SystemVerilog code and drive continuous Power, Performance, and Area (PPA) optimization.

     4.         Collaborate closely with the verification team to define test plans, support the development of UVM-based testbenches, and assist in debugging.

     5.         Partner with algorithm and software teams to analyze kernel performance and guide optimization strategies.

     6.         Contribute to logic synthesis, static timing analysis (STA), power analysis, and collaborate on physical design co-optimization.

     7.         Support FPGA prototyping and silicon bring-up, assisting with post-silicon debugging and resolving issues identified during the tape-out process.

Qualifications:

Required:

     8.         Master’s degree or higher in Microelectronics, Electronic Engineering, Computer Science, or a related field.

     9.         3+ years of experience in digital IC design. Experience with GPGPUs, AI accelerators, high-performance computing (HPC) chips, or complex SoCs is highly preferred.

 10.         Proficiency in Verilog and SystemVerilog, with a solid understanding of the digital design flow.

 11.         Familiarity with industry-standard EDA tools (e.g., Synopsys, Cadence, Mentor Graphics suites).

 12.         Strong foundational knowledge of computer architecture, including parallel computing, cache coherence, and memory hierarchies.

 13.         Excellent communication and teamwork skills, with a demonstrated ability to analyze and resolve complex technical issues.

Preferred:

 14.         Experience with GPGPU programming models (e.g., CUDA, OpenCL).

 15.         Working knowledge of AMBA bus protocols (AXI, AHB, APB).

 16.         Proficiency in scripting languages (e.g., Python, Tcl, Perl) for automating design flows.

 17.         Experience with tape-outs in advanced technology nodes (e.g., 7nm, 5nm).

 18.         Familiarity with advanced packaging and interface technologies such as Chiplet, HBM, and high-speed SerDes.