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GPU HW Design Engineer

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Onsite

GPU HW Design Engineer

MediaTek

GPU HW Design Engineer

2 months ago

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Important information


Contract type:

Permanent

Location:

Hsinchu, North District, Hsinchu City, Taiwan

Work mode:

Onsite

Published on:

7 August 2026

What they need


Role and Responsibilities

  • Collaborate with architects and design leads to define and document micro architecture of sub-modules of shader subsystem
  • RTL coding and deliver high quality scalable design to meet PPA requirements
  • Collaborate with verification team for feature description, testplan, and coverage closure
  • Assist DV engineers for debugging functional, performance, power test failures
  • Collaborate with synthesis and PD team for timing and area closure
  • Collaborate with power team to identify power saving opportunities and meet power target
  • Assist block team manager in strategy, planning, scope estimation, and progress reporting

Main Requirements and Qualifications

  • Requirement
  • MS or PhD degree or equivalent in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • 5+ years of working experience on RTL design and overall ASIC design flow
  • Working experience of designing high throughput and low latency designs
  • Good knowledge of synthesis and PD flows
  • Good knowledge of different design techniques and their implications on physical design
  • Hands-on experience on SystemVerilog/VHDL/C/C++ and scripting programming
  • Hands-on knowledge/experience on pipeline design, digital signal processing, area/power optimization flow
  • Good teamwork and excellent interpersonal skills including both verbal and written communication
  • Strong problem solving, root causing and debugging skills
  • Good English reading and writing capabilities for technical documentation.
  • Able to work in a dynamic and fast changing environment
  • Preferred skills:
  • -Knowledge/experience on GPU pipeline (Shader, Texture, Geometry, Pixel, Raytracing, Memory etc.) and GPU architecture.
  • -Knowledge/experience on computer architecture, parallel computing or cache system.
  • -Knowledge/experience on floating point data processing.
  • -Experience collaborating with worldwide, cross-functional engineering teams.

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