Intel Corporation

<h1><strong>Job Details:</strong></h1>
<h2>Job Description:</h2>
<p>About the Foundry Technology Development Group:</p>
<p>Foundry Technology Development (Foundry TD) is the heart and soul of Moore's Law at Intel, enabling Intel to create world-changing technology that enriches the lives of every person on earth. FTD employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities.</p>
<p>The Design Technology Platform (DTP) team in Foundry TD works closely with the technology team to maximize the value proposition of the technology for our customers thru Design Technology Co-Optimization (DTCO) and delivers the Process Design Kits (PDKs) and Foundational IP (FIP) that designers need to support their product design work and fully leverage the technology. The DTP organization scope includes technology design rules and models, technology and IP testchips, Process Design Kits (PDKs) and Foundational IP. The FIP Platform team is responsible for defining FIP Platform requirements and performing Platform testing and FIP integration QA.  </p>
<p>About the Role:<br>You will be part of FIP Platform and QA team, participating in FIP Integration QA work which may include reference designs development using Intel-designed Foundational IPs. You will utilize industry standard tools to implement these designs from RTL to GDS. You will perform all aspects of the SoC design flow on these designs to ensure that the Foundation IP meet stringent quality requirements.  </p>
<p>Additional responsibilities for this position include:</p>
<ul>
<li>Scripting and automation of the physical design and debug flows.</li>
<li>Running internal IP QA flows on Foundation IP.</li>
<li>Development of new IP-level quality checks.</li>
<li>Interaction with EDA tool vendors to debug issues and develop QA flows.</li>
<li>Interaction with our internal Foundation IP development teams to summarize and debug issues.</li>
<li>Apply data analytics and AI/ML techniques to optimize execution processes, improve coverage and quality.</li>
</ul>
<p>#dtpmy</p>
<p><em>"Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to our staffing team at</em><a href="mailto:malaysia.staffing@intel.com" rel="nofollow noopener" target="_blank"><em>malaysia.staffing@intel.com</em></a><em>."</em></p>
<h2><strong>Qualifications:</strong></h2>
<ul>
<li>Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering, or equivalent.</li>
</ul>
<p>The ideal candidate should exhibit behavioral traits that indicate:</p>
<ul>
<li>Solid interpersonal skills including written verbal and presentation communications.</li>
<li>Highly organized with the ability to prioritize and multi-task effectively.</li>
<li>Excellent analytical and problem-solving skills.</li>
<li>Effective team player with continuous learning mindset</li>
<li>High motivation and results orientation</li>
</ul>
<h2>Job Type:</h2>
<p>Intel Contract Employee</p>
<h2>Shift:</h2>
<p>Shift 1 (Malaysia)</p>
<h2>Primary Location:</h2>
<p>Malaysia, Penang</p>
<h2>Additional Locations:</h2>
<h2>Posting Statement:</h2>
<p>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.</p>
<h2></h2>
<h2>Position of Trust</h2>
<p>N/A</p>
<p><strong>Work Model for this Role</strong></p>
<p>This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.</p>
<p>*</p>
<p>ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.</p>


Graduate Talent (Physical Design Engineer)

Graduate Talent (Physical Design Engineer)

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