Hardware Design Engineer

Senior RTL Design Engineer (ASIC/FPGA)

We're developing advanced baseband signal processing technology for next-generation satellite communications, helping bring 5G connectivity to the entire globe.

We're looking for multiple Senior RTL Design Engineers to develop high-performance digital hardware for cutting-edge, space-qualified devices. You'll work across ASIC and FPGA platforms, contributing to innovative communications technology with global reach.

The role

You'll translate system and algorithm requirements into efficient RTL implementations, working alongside multidisciplinary engineering teams across design, verification and physical implementation.

Key responsibilities include:

• Developing complex RTL designs using Verilog and SystemVerilog.
• Translating system requirements into detailed microarchitectures.
• Optimising designs for timing, power, hardware utilisation and performance.
• Using simulation, synthesis and timing analysis tools to validate designs.
• Deploying designs onto FPGA platforms for validation and system integration.
• Collaborating across the engineering lifecycle to deliver high-quality IP solutions.

What we're looking for

• Strong experience in RTL design using Verilog and/or SystemVerilog.
• Experience delivering digital designs for ASIC and/or FPGA products.
• Knowledge of synthesis, timing analysis and hardware optimisation.
• Experience with industry-standard EDA tools.
• Strong collaboration and technical documentation skills.