Hardware Engineer (FPGA/CPLD)

• Lead the design, development and implementation of technical solutions in multiple domains. Participate in project planning and scheduling. Review, interpret and may negotiate customer requirements/specifications and provide customer feedback Lead the deployment of strategic programs and coordinate site-wide deployment efforts.
• Proactively promote industry best practices
• May manage relationships with key vendors/partners.
• Research systems ideas and draw up plans for these systems
• Design, modify and implement systems that meet customer and Celestica needs. E.g. Architecture of solution: Divide up tasks for various engineering teams to execute taking into consideration requirements engineering, reliability, logistics, coordination of different teams, testing and evaluation, maintainability and many other disciplines necessary for successful system design and field support.
• Test, simulate and measure (including troubleshooting) the performance of systems
• Keep up to date with relevant industry knowledge and regulations
• Solve complex problems
• Liaison with suppliers, customers, contractors, and other internal teams.
• Analyze and interpret data and information
• Recommend system modifications
• Create reports and documentation
• Set yearly plans and goals for the department, give direction on expected performance, provide regular performance evaluations and ongoing feedback. Accountable for all department objectives and achieving agreed targets for key performance indicators.
• Ability to read/understand schematics, have a basic understanding of HW architecture and concepts such as Clock, Interrupts, DC/DC, Ripple, Buses such as SATA/SAS/PCIe/I2C/SPI etc.

Knowledge/Skills/Competencies:

• FPGA design processes including programming, constraints edit, functional verification, logic synthesis, floorplan and route, timing verification
• Hardware description language VHDL, Verilog HDL, System Verilog
• Development tools including Xilinx ISE, Altera Quartus etc.
• Simulation tools of ModelSim SE
• Synthesis tools of Synplicity Synplify
• BS/EE with 4+ years of FPGA/CPLD development experience.
• Solid Verilog RTL and test bench coding skills, good coding style.
• Familiar with at least one mainstream FPGA and development platform, Xilinx/Altera/Lattice.

This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.