Head - Design & Engineering

The Head – Design & Engineering will be responsible for leading the design, engineering, and technical governance of large-scale Data Center projects. This role will drive end-to-end engineering excellence across both greenfield and brownfield developments while ensuring scalability, reliability, sustainability, and compliance with global Data Center standards.

The position requires strong leadership experience in mission-critical facilities, hyperscale Data Centers, MEP systems, and large infrastructure project delivery.

Position: Head – Design & Engineering (Data Center)

Location: Navi Mumbai

Experience: 18-28 Years

Industry: Data Center, Mission Critical Infrastructure, Colocation, Hyperscale

Employment Type: Full Time

Required Experience

• 18+ years of experience in Engineering, Design, or Project Delivery.
• Minimum 10 years of experience in Data Center Design & Engineering.
• Experience in Hyperscale, Colocation, Cloud, Telecom Infrastructure, or Mission Critical Facilities.
• Strong exposure to critical power and cooling infrastructure.
• Proven experience in managing large engineering teams and handling multiple projects simultaneously.

Key Responsibilities

• Lead the overall Design & Engineering function for Data Center projects.
• Drive conceptual, schematic, detailed, and IFC design development.
• Review and approve engineering designs, calculations, layouts, and technical specifications.
• Lead multidisciplinary teams across Electrical, Mechanical, Civil, Structural, Architectural, Fire & Security systems.
• Ensure compliance with Uptime Tier standards, TIA-942, ASHRAE, NFPA, and other industry regulations.
• Provide technical leadership during project execution and commissioning.
• Manage consultants, EPC contractors, OEMs, and engineering partners.
• Drive value engineering, innovation, and cost optimization initiatives.
• Support capacity expansion strategies for hyperscale and colocation facilities.
• Lead sustainability initiatives with a focus on energy efficiency and PUE optimization.