芯荣半导体有限公司
数字IC中端工程师
1 month ago
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Important information
Contract type:
Permanent
Location:
Shanghai, China
Work mode:
Onsite
Published on:
20 September 2026
What they need
该职位来源于猎聘 岗位职责： 1、负责逻辑综合 Synthesis； 2、负责静态时序分析 STA； 3、负责DFT 可测性设计； 4、负责低功耗设计； 5、负责流程自动化与项目交付； 任职资格： 1、学历：本科/硕士，微电子、集成电路、电子工程； 2、项目：完整流片 Tape-out 经验，独立负责模块/全芯片综合、STA 签核、DFT 3、EDA 工具：Synopsys DC、PT、Formality、TetraMAX；或 Cadence Genus、Tempus 4、基础：熟悉 Verilog，精通 SDC；掌握 TCL 脚本，会写自动化流程；理解时序理论、OCV、UPF 低功耗、DFT 原理
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