UST Malaysia
IC Package Design Engineer (Flip Chip/Substrate)
2 months ago
Share this opportunity
Share this opportunity to other talents of your network:
✓ Offer them a visibility boost with clients.
✓ Help your contacts find their next job.
Important information
Contract type:
Permanent
Location:
Bayan Lepas, Penang, Malaysia
Work mode:
Onsite
Published on:
19 August 2026
What they need
Role Overview
We are seeking a highly skilled Package Design Engineer with 5–8 years of experience in advanced IC packaging. The ideal candidate will have strong expertise in Flip Chip and multi-layer substrate (8+ layers) design , with a solid understanding of substrate manufacturing and assembly rules. The role requires close collaboration with cross-functional teams and vendors to deliver high-performance, reliable, and manufacturable package solutions.
Key Responsibilities
- Perform the design and development of multi-layer package substrates (8+ layers) for advanced semiconductor devices.
- Perform package layout, routing, and stack-up planning using EDA tools (Mentor Graphics, Cadence Allegro, PLA) .
- Ensure designs comply with substrate manufacturing rules (trace width/spacing, via design, impedance requirements).
- Incorporate assembly rules (die placement, bump/ball pitch, solder joint reliability, warpage control) into package designs.
- Develop and validate Flip Chip package designs , including bump assignment, redistribution layers (RDL), and underfill considerations.
- Collaborate with Signal Integrity (SI), Power Integrity (PI), and thermal analysis teams to ensure robust performance.
- Partner with substrate vendors and OSATs to verify design manufacturability, yield, and assembly feasibility.
- Provide on-site vendor support when required to resolve design and assembly issues.
Skills & Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Materials Science, or related field .
- 5–8 years of hands-on experience in package design, with proven expertise in multi-layer (8+) substrate design .
- Proficiency with EDA tools : Mentor Graphics (Preferred) , Cadence Allegro, PLA. (Mentor Graphics Xpedition / Cadence Allegro Package Designer)
- Strong knowledge of substrate manufacturing rules and assembly rules .
- Experience with Flip Chip package design methodologies .
- Familiarity with SI/PI/thermal considerations in advanced packages.
- Strong communication and collaboration skills for cross-functional and vendor engagement.
- Flexibility to travel and provide on-site vendor support as needed.
Other offers great for you!
These companies are also looking for great profiles
Rheso.tech
Mission Analog / Mixed-Signal IC Design Engineer
Freelance
Toulouse, France
Hybrid
Skills
4 days ago
Quick apply
LeHibou
People Transformation & Organisation Design Lead – IT
558€ / jour
Freelance
Brussels, Belgium
Hybrid
Skills
20 hours ago
Quick apply
Mobiskill
AI Engineer
500
Freelance
Paris, France
Hybrid
Top Recruiter
Skills
16 hours ago
Quick apply
No company information available.