IC Packaging Design, Manager (IC封裝)

Working location: China (Open to international applicants—visa sponsorship provided for qualifying candidates)

Key Responsibilities

• Package Design & Development:
• Lead the design and development of new MOSFET packages, especially for lead frame based (e.g. DFN).
• Lead frame and clip frame design experience is preferred.
• Create detailed package models using 3D CAD software and define all critical dimensions, material stack-ups, and assembly drawings.
• Optimize package designs for superior electrical performance (low RDS(on), low parasitic inductance/capacitance), thermal performance (low RthJC), and mechanical robustness.
• Simulation & Analysis:
• Perform multi-physics simulations, including thermal (e.g., Ansys Icepak, SolidWorks Simulation), electrical (e.g., Q3D Extractor, HFSS), and mechanical stress analysis to predict and validate package performance.
• Analyze simulation results to identify design trade-offs and drive design improvements.
• Correlate simulation models with empirical data from lab characterization to ensure accuracy.
• Material Selection & Qualification:
• Evaluate and select packaging materials, including leadframes, mold compounds, die-attach materials, and bonding wires, to optimize performance, reliability, and cost.
• Work with suppliers to qualify new materials and processes.
• Cross-Functional Collaboration:
• Collaborate closely with silicon design, test engineering, product engineering, and reliability teams to ensure package designs meet all product specifications.
• Partner with PE and EE to develop robust manufacturing processes, troubleshoot yield issues, and ensure smooth new product introductions.
• Interface with application engineers to understand customer requirements and translate them into package design criteria.
• Documentation & Process Improvement:
• Maintain comprehensive design documentation, including specifications, simulation reports, and assembly procedures.
• Contribute to the development of internal design rules, guidelines, and best practices for package engineering.
• Stay current with industry trends, emerging packaging technologies, and competitive landscape.

Required Qualifications

• Education: Bachelor of Science (B.S.) in Mechanical Engineering, Electrical Engineering, Materials Science, or a related field. A Master of Science (M.S.) is highly preferred.
• Experience:
• 5+ years of direct experience in semiconductor package development, with a strong focus on power devices (MOSFETs or IGBTs) .
• Proven track record of successfully taking packages from concept through design, simulation, and high-volume manufacturing.
• Technical Skills:
• Proficiency in 3D CAD software (e.g., AutoCAD, SolidWorks, Creo).
• Strong understanding of semiconductor packaging processes, including die attach, wire bonding, and molding.
• Deep knowledge of power semiconductor physics, including thermal management, parasitics, and failure mechanisms.
• Familiarity with reliability testing standards and methodologies (e.g., JEDEC, AEC-Q101) for automotive and industrial applications.