IC Verification Engineer

• Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
• Architect and develop scalable and re-usable test benches, using the framework of the verification methodology
• Build pseudo-random tests to verify and get full Functional coverage
• Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
• Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.
• Drive improvements in Verification in terms of quality and efficiency.

Requirements:

• Bachelors degree in Electrical Engineering or related degree with 8+ years relevant experience or Masters degree in Electrical Engineering or related degree with 6+ years related experience
• 6+ years of experience in writing and debugging complex test benches
• Must have deep understanding of all aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage.
• Must have proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM
• Should have exceptionally good command of Object-Oriented Programming principles.
• A good understanding of a complex protocol like PCIe or other multi-layered protocol
• Capability to work independently and deliver.
• Knowledge of PCI Express protocol is desired

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