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数字IP设计工程师7167

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数字IP设计工程师7167

UNISOC

数字IP设计工程师7167

1 year ago

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Important information


Contract type:

Permanent

Location:

Nanjing, Jiangsu, China

Work mode:

Onsite

Published on:

8 August 2026

What they need


工作职责 1、完成模块从算法/协议到架构的实现;2、完成模块的RTL实现及相关验证工作;3、完成模块的PPA(Performance,Power,Area)优化;4、参与算法/协议/架构的评估与优化;5、参与模块的FPGA验证及芯片调试;6、参与技术方向的规划和解决方案的评估。

任职要求 1、电子/信息相关专业,硕士及以上学历,3年及以上工作经历;2、精通verilog RTL描述语言;3、熟悉数字电路设计和验证方法学;4、熟悉EDA工具和脚本语言;5、熟悉视频标准或图像处理或MIPI/USB/DDR/PCIE等高速接口或ISP IP;6、熟悉AMBA总线协议(AXI/APB/AHB);7、对多媒体或高速接口有一定的设计经验;8、对低功耗设计有一定的了解;9、对计算机体系结构有一定的了解;10、正直诚信、有责任心、有团队合作精神。

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