UNISOC
数字IP设计工程师(video)6711
1 year ago
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Important information
Contract type:
Permanent
Location:
Shenzhen, Guangdong Province, China
Work mode:
Onsite
Published on:
16 August 2026
What they need
工作职责 1、完成模块从算法/协议到架构的实现； 2、完成模块的RTL实现及相关验证工作； 3、完成模块的PPA（Performance，Power，Area）优化； 4、参与算法/协议/架构的评估与优化； 5、参与模块的FPGA验证及芯片调试； 6、参与技术方向的规划和解决方案的评估。
任职要求 1、电子/信息相关专业，硕士及以上学历，3年以上工作经历； 2、熟悉verilog RTL描述语言；C/C++语言； 3、熟悉数字电路设计和验证方法学； 4、熟悉video codec（encoder/decoder/视频编码/视频解码/视频编解码/H.264/H.265/VP9或图像处理等） 5、正直诚信、有责任心、有团队合作精神。
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