Layout Design Engineer

Job highlights

• Expertise in Cadence VLE / VXL and Calibre DRC / LVS is a must

• Multiple Tape out support experience will be an added advantage

• Scripting and automation experience is good to have but not mandatory

• Experienced in analog/custom layout design in advanced CMOS process.

• Expertise in Cadence VLE/VXL and Calibre DRC/LVS is a must.

• Should have hands on experience of Critical Analog Layout design of blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump,Current Mirrors, Comparator, Differential Amplifier etc.,

• Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, cross-talk, IR-drop, active and passive parasitic devices etc.)

• Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,

• Ability to understand design constraints and implement high-quality layouts.

• Excellent command and problem-solving skills in over Physical layout verification.

• Multiple Tape out support experience will be an added advantage.

• Scripting and automation experience is good to have but not mandatory.

• Excellent verbal and written communication skills.