Lead ASIC Enginer

Lead ASIC Engineer

Location: Sydney, NSW (Remote considered)

Salary: Competitive (DOE)

Brief Intro

A Sydney-based deep-tech startup is building a next-generation ASIC at the core of its quantum hardware, and is looking for a Mixed-Signal ASIC Lead to take ownership of the chip from spec through to measured silicon.

Key Skills

• Mixed-signal ASIC design
• CMOS design & specification
• Design verification/simulation
• First-silicon bring-up & characterisation
• Noise, linearity, bandwidth & power characterisation
• External design partner management
• Lab-based measurement & automation

Non-essential/Beneficial Skills

• PCB/package layout for ASIC test interfaces
• Needle probing & probe card design
• FPGA controller programming
• FPGA-to-CMOS/SoC migration

If you are interested and think you have the skills required as a Lead ASIC Engineer, please don't hesitate to apply.